1. Field of the Invention
The present invention generally relates to digital demodulators and, more particularly, to a demodulator for demodulating a .pi./4-shift DQPSK (differential quadrature-phase-shift keying) signal.
2. Description of the Prior Art
A wide variety of digital modulation systems has been proposed so far (see Japanese Published Patent Publication No. 59-16456). In a digital cellular system now examined in the U.S.A. and Japan, the employment of the .pi./4-shift DQPSK system is already determined.
In the case of the .pi./4-shift DQPSK system, the occupied frequency band width thereof is the same as compared with that of the ordinary DQPSK and a fluctuation of a modulated wave is small. Accordingly, the .pi./4-shift DQPSK is advantageous for a power amplifier operable in a linear fashion. However, if the .pi./4-shift DQPSK signal is demodulated similarly to the conventional DQPSK signal, there is then the disadvantage such that an error rate is deteriorated.
FIG. 1 of the accompanying drawings shows the location of signal points corresponding to 2-bit data of the conventional DQPSK signal. In this case, a carriers having a phase parallel to an I axis or Q axis is employed as a carrier used in the demodulation.
Assuming now that the carrier phase is equal to an axis OI, then a detection level of (+a/2.sup.1/2, +a/2.sup.1/2) is obtained at a point P.sub.1. Accordingly, if this detection output is added to an I-axis discriminator and a Q-axis discriminator, then a discriminated output of (I=+, Q=+) is obtained so that a receiving signal (e.g., 00) can be demodulated.
The above demodulation is also true in the .pi./4-shift DQPSK modulation system. An essential point of this .pi./4-shift DQPSK modulation system will be described with reference to FIGS. 2 and 3.
FIG. 2 is a block diagram schematically showing an arrangement of the .pi./4-shift DQPSK modulation system. As shown in FIG. 2, in the .pi./4-shift DQPSK modulation system, original serial data, i.e., 2-bit signals X.sub.k, Y.sub.k transferred in series are converted into parallel signals by a serial-to-parallel (S/P) converter circuit 30 and these signals are supplied to a differential QPSK modulating circuit 29 which then produces phase-shifted signals I.sub.k, Q.sub.k.
In such .pi./4-shift DQPSK modulation system, a modulated wave M.sub.k at time t=kT (T is a duration of symbol) is expressed by the following equation (1): EQU M.sub.k =M.sub.k-1 .multidot.e.sup.j.DELTA..phi.(Xk, Yk) ( 1)
Thus, the modulated wave M.sub.k can be expressed in the form of a complex number. The phase shift amount .DELTA..phi. is determined by the 2-bit signals X.sub.k and Y.sub.k as shown on the following table 1.
TABLE 1 ______________________________________ X.sub.k Y.sub.k .DELTA..phi. ______________________________________ 1 1 -3/4.pi. 0 1 +3/4.pi. 0 0 +1/4.pi. 1 1 -1/4.pi. ______________________________________
Accordingly, the signal points of the .pi./4-shift DQPSK wave are expressed as shown in a signal point transition diagram forming FIG. 3. More specifically, let us assume that a signal point exists on a point P.sub.1 at time of, for example, t=(k-1) T.
(1) If (X.sub.k =1, Y.sub.k =1), then a signal point is moved to P.sub.6 ; PA1 (2) If (X.sub.k =0, Y.sub.k =1), then a signal point is moved to P.sub.4 ; PA1 (3) If (X.sub.k =0, Y.sub.k =0), then a signal point is moved to P.sub.2 ; and PA1 (4) If (X.sub.k =1, Y.sub.k =0), then a signal point is moved to P.sub.8. PA1 If (X.sub.k =0, Y.sub.k =0), then a signal point is moved to P.sub.2. PA1 (1) If (X.sub.k+1 =1, Y.sub.k+1 =1), then a signal point is moved from P.sub.2 to P.sub.7 ; PA1 (2) If (X.sub.k+1 =0, Y.sub.k+1 =1), then a signal point is moved from P.sub.2 to P.sub.7 ; PA1 (3) If (X.sub.k+1 =0, Y.sub.k+1 =0), then a signal point is moved from P.sub.2 to P.sub.3 ; and PA1 (4) If (X.sub.k+1 =1, Y.sub.k+1 =0), then a signal point is moved from P.sub.2 to P.sub.1. Signal points will hereinafter be moved similarly as described above.
Next, at the timing point of t=(k+1),
When the signal modulated according to the DQPSK modulation system is demodulated, if a carrier having the same phase as that of, for example, an axis OP.sub.1 is employed as a demodulation reference axis, (+a, 0) is output as a demodulated output. When this demodulated output is supplied to an I-axis discriminator or Q-axis discriminator, in the reception condition in which a carrier-to-noise (C/N) ratio is low, there is a large possibility that the detector may derive an output (I=+, Q=-) or (I=+, Q=+), resulting in an error. As a consequence, an error rate of data is considerably deteriorated.
However, the .pi./4-shift DQPSK modulation system might be considered as a DQPSK system in which the reference phase axis is rotated by 45 degrees each in the counter-clockwise direction in synchronism with the transmission time of symbol because the phase is shifted by .pi./4 at (0, 0). As a consequence, when the signal modulated according to the above modulation system is demodulated, if a conventional synchronizing detector in which a phase of a detection reference axis is fixed is utilized, then the above-mentioned disadvantage occurs at every time interval 2T (e.g., when 2-bit data is changed from P.sub.1 to P.sub.2 and to P.sub.1 in that order). There is then the disadvantage that a bit error rate is deteriorated considerably.